System Integration – Access Provider: Tyndall (MCCI)

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Access Description
Technical Offering
Main Equipment
Typical Application
Case Study
Key Specifications

Integrated Power Systems

Access Description
Advanced componentry and complete systems design capability in highly integrated low power system design. Prototyping and design of constituent passive components – magnetics, capacitors and packaging/interconnect. Design of power topologies and circuits which may be discrete circuit or on CMOS. Mixed signal power control designs are a key focus. The integrated power systems development capability enjoys the cross-leveraging benefit of other technology ‘supplier’ groups from within Tyndall to collectively provide an advanced ‘one-stop-shop’ systems team. For example co-located groups are involved in:

  • TEG Materials Synthesis
  • Atomic Layer Deposition Supercapacitors
  • Solid State Electrochemical Cell Energy Storage
  • Advanced Data Converter Design on CMOS
  • Thin Film Magnetics-on-Silicon Design and Fabrication
  • Electromagnetic Energy Harvesters – Micro-scale – incorporating thin film permanent magnets
  • AlN Piezo Energy Harvesters
  • Microelectronic Packaging and Prototype
  • Electromagnetic Positioning Systems for Surgical Devices
  • Wireless Sensor Network Design
  • RF Design

The Integrated Power Systems capability is centred on power circuit solutions for the lower power range in IoT devices – micropower energy harvesters through to POL (point of load) converter design for next generation portable computing and mobile phone SoC (silicon on chip). POL converter designs on CMOS and employing advanced thin film sputtered or plated inductive components are the primary speciality. Packaging formats are embedded in substrate, on-die (PwrSoC) or package based (PwrSiP). Galvanically isolated gate-driver circuits for MOSFETs and GaN switches in Automotive and Energy are of growing interest to the group. Topology development for Ultra-Low Power (ULP) at μW level through to POL at 10’s Amps is supported with advanced controller design capability on CMOS (180nm SOI). Switch technologies across Bulk and SOI CMOS, VDMOS and GaN HEMT are utilised. Research challenges in inductively coupled power solutions will additionally be welcomed and complement the group’s modelling and design capability in miniature and on-die coupled coils.

Technical Offering
  • Design of CMOS PMIC for Ultra Low Power Conversion (1µW to 100mW)
  • Mixed Signal Controller Design on CMOS
  • Magnetic component design and modelling – analytic and Finite Element
  • Electrical Design and Modelling: Matlab, Simulink, Cadence Mixed Signal, Verilog, AMS, Finite Element
  • State Space modelling of POL and VRM power converters with novel controllers
  • Laminated sputtered thin film CZT magnetic component designs operating to 100MHz are possible, with particular interest in multi-phase interleaved and coupled inductors
  • Substrate embedded magnetics design – planar toroid, solenoidal and closed core
  • Assessment of optimised power management for ultra-low power system use cases that consists of energy harvested power sources, power storage, sensors and radio technologies
  • High level real world energy harvesting system modelling in conjunction with power conversion and energy storage blocks to enable optimisation for specific use cases – power consumptions and energy flows
  • Use case driven characterisation of power management IC technology including interfaces into MCU, Energy Harvesters, Energy Sources, Sensors and Transceivers
    MEMs scale TEG, Piezo, Electromagnetic Transduction energy transducer fabrication and characterisation
Main Equipment / Facilities
  • Full suite of advanced chip scale and package level characterisation and prototyping equipment – generally down to 18µm diameter wire bonding
  • Co-located silicon fabrication with extensive MEMs capability
  • Electrical component and CMOS circuit characterisation to 28GHz
  • Power electronic circuit prototyping and characterisation
Typical applications
Low power energy harvesting based or long operational life battery driven systems will require the highest possible efficiency power processing from sub µW level. A PMIC for such an application requires a power management system that can start up (self-bias) from a very high impedance and probably low voltage source (cold start), efficiently convert energy at low power levels from an energy source with changing characteristics (<1 to 100s µW) and regulate accurately to a dynamically operating load, requiring a very low quiescent current PMIC.
Typical applications that require this type of technology are, but not limited to, conditional monitoring of machines, equipment and infrastructure, low power Asset Tracking systems and Building Energy Management (BEM) systems.
Case Study
An SME or research team who are developing either an ultra-low autonomously powered or extended battery life wireless sensed data system that requires custom highly optimised power management. EnABLES will provide access to the facilities, expertise and IC research infrastructure required. A typical project would give access to Tyndall’s PMIC technology together with the ability to characterise, simulate, optimise and modify circuit blocks in simulation within the PMIC tailored to the specific use case. In addition access would be given to system level simulations where appropriate enabling the Research Team or SME to investigate PMIC performance when interfaced with Energy Harvesters, Energy Sources, Transceivers or Sensors.

Séamus O’Driscoll
Principal Investigator – Integrated Power Systems

Key specifications
“Mischief” is a multi-source energy harvesting (EH), ultra-low power processing (ULP) PMIC to efficiently convert and manage power from Low Lux PV, Vibrational Energy Harvesting (VEH) types EMT, PZT, Electret Hybrid or Thermoelectric (TEG) source. It is a collaboration between Tyndall and MCCI (an industry driven CMOS research centre hosted by Tyndall) and is a platform IC which will act as a basis for high performance custom ULP PMIC ICs. It is heavily mixed signal and is therefore flexible and will enable next generation intelligent features, tailored for specific application.
Unique selling propositions (USPs)
  • Highest efficiency from 1µW upwards (Marketplace ICs enter at 15µW)
  • Lowest quiescent current (IQ ~200nA)
  • Flexible Mixed Signal Platform to enable advanced next generation features such as PZT Synchronous Electric Charge Extraction (SECE)
  • DC input Range 0.5-5V, AC Input to 100V Possible
  • Buck and Boost Modes
  • Efficiency 80-95%
ULP Mixed Signal Architecture
  • Advanced Asynchronous PWM Modes for 1st Valley Quasi Resonant 4-Switch Buck-Boost Topology
  • Advanced ULP asynchronously triggered digital timers
    • 300MHz Clock and Digital Counter based
    • Current Starved Cap Charging and 20nA Comparator
    • New Delay Architecture for ULP Hi-Res Long Delays with Dynamically Clocked Comparator
  • Fast high side current sensing comparator for SR switch drive
  • 60nA fractional band-gap bias alive charge pump system
  • SPI Master for Serial EEPROM Configuration
The IC is being developed as a flexible ULP PMIC Platform IC on XFAB xt018 (180nm SOI)